Partially resolve #55 by reducing vias and severed traces in the RF path.

hardware/rfsw-mchip.sch

@@ -981,4 +981,34 @@ F 3 "~" H 2850 3600 50  0001 C CNN
 $EndComp
 Wire Wire Line
 	3050 3500 2850 3500
+Text Notes 9200 2750 0    50   ~ 0
+Layout connects the MCU and RF/SP3T\nfor HPOUT with two (2) via pairs, bad.
+Text Notes 8750 3200 0    50   ~ 0
+Layout connects the MCU and SP3T\nfor HFIN with one (1) via pair, good.
+Text Notes 9100 4700 0    50   ~ 0
+Layout connects the MCU and RF/SP3T\nfor HFOUT with one (1) via pair, good.
+Wire Notes Line
+	9050 4500 9050 4750
+Wire Notes Line
+	9050 4750 10650 4750
+Wire Notes Line
+	10650 4750 10650 4500
+Wire Notes Line
+	10650 4500 9050 4500
+Wire Notes Line
+	8700 3000 8700 3250
+Wire Notes Line
+	8700 3250 10200 3250
+Wire Notes Line
+	10200 3250 10200 3000
+Wire Notes Line
+	10200 3000 8700 3000
+Wire Notes Line
+	9150 2550 9150 2800
+Wire Notes Line
+	9150 2800 10750 2800
+Wire Notes Line
+	10750 2800 10750 2550
+Wire Notes Line
+	10750 2550 9150 2550
 $EndSCHEMATC