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Code Issues 82 Pull Requests 0 Releases 5 Wiki Activity
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1 Commits (062c71befc36a51ef9cc9f935e17a716eced0d75)

Author SHA1 Message Date
  Michael Schloh von Bennewitz bb8473ae5a Complete production grade panelisation and foil design for LPKF frames. 4 years ago
  Michael Schloh von Bennewitz fe06fd495f Adjust track width, via drills, and annular rings to minimum specs. 4 years ago
  Michael Schloh von Bennewitz 8d28560c4e Tighten tolerances to highest four layer ENIG cheap fabrication capacity. 4 years ago
  Michael Schloh von Bennewitz f779b7999a Adapt layers and tolerances to correspond with four layer qualities. 4 years ago
  Michael Schloh von Bennewitz a71b05cc81 Prepare for layout edition in BGA with corresponding traces and vias. 4 years ago
  Michael Schloh von Bennewitz 41e5f095e8 Include more project boilerplate structure and library cache. 4 years ago
  Michael Schloh von Bennewitz 56dfb433cc Initialise hardware engineering for imminent schematic capture. 4 years ago
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