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程式碼 問題管理 82 合併請求 0 版本發佈 5 Wiki Activity
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目錄樹: 28f686cd2b
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15 次程式碼提交 (28f686cd2b95e269e855b996221a617d387973ff)

作者 SHA1 備註 提交日期
  Michael Schloh von Bennewitz 45b3467dc1 Add standoff holes towards the middle of panels to allow more support. 4 年之前
  Michael Schloh von Bennewitz 72c593b8f8 Recorrect format from PDF to Gerber RS-274X and repaint pour hatches. 4 年之前
  Michael Schloh von Bennewitz 8e0ade7765 Recorrect panelised format when plotting Gerber and Excellon archives. 4 年之前
  Michael Schloh von Bennewitz e55d772e7e Modify SWDCLK route between programming connectors to satisfy fabricator. 4 年之前
  Michael Schloh von Bennewitz 44f662eb77 Correct the target output directory path to correspond with panels. 4 年之前
  Michael Schloh von Bennewitz 659c316ae0 Bump revision numbers, dates, and copyright pending release to manufacturing. 4 年之前
  Michael Schloh von Bennewitz 409d07abe1 Redesign panel and foil for board fabrication after adding via stiching. 4 年之前
  Michael Schloh von Bennewitz a64db6a94c Make a intermediate commit to track the panel design with custom planes. 4 年之前
  Michael Schloh von Bennewitz a36d54c0dc Update panel design pending release of 0.9.4 to board fabrication. 4 年之前
  Michael Schloh von Bennewitz c80ec05067 Correct electronic design rules check results pending imminent release. 4 年之前
  Michael Schloh von Bennewitz f143228cb3 Selectively remove paste apertures and replace hole cuts with drills. 4 年之前
  Michael Schloh von Bennewitz 8e9ea6370a Generate and curate parts list, panel design, and stencil foil. 4 年之前
  Michael Schloh von Bennewitz 819a415fc9 Modify deprecated secure element model to new ATECC608B throughout. 4 年之前
  Michael Schloh von Bennewitz b969424881 Resolve #104 by removing unconnected vias from AE5 pad 1. 4 年之前
  Michael Schloh von Bennewitz bb8473ae5a Complete production grade panelisation and foil design for LPKF frames. 5 年之前