dsendcomm

コミットグラフ

作成者	SHA1	メッセージ	日付
Michael Schloh von Bennewitz	45b3467dc1	Add standoff holes towards the middle of panels to allow more support.	4年前
Michael Schloh von Bennewitz	72c593b8f8	Recorrect format from PDF to Gerber RS-274X and repaint pour hatches.	4年前
Michael Schloh von Bennewitz	8e0ade7765	Recorrect panelised format when plotting Gerber and Excellon archives.	4年前
Michael Schloh von Bennewitz	e55d772e7e	Modify SWDCLK route between programming connectors to satisfy fabricator.	4年前
Michael Schloh von Bennewitz	44f662eb77	Correct the target output directory path to correspond with panels.	4年前
Michael Schloh von Bennewitz	659c316ae0	Bump revision numbers, dates, and copyright pending release to manufacturing.	4年前
Michael Schloh von Bennewitz	409d07abe1	Redesign panel and foil for board fabrication after adding via stiching.	4年前
Michael Schloh von Bennewitz	a64db6a94c	Make a intermediate commit to track the panel design with custom planes.	4年前
Michael Schloh von Bennewitz	a36d54c0dc	Update panel design pending release of 0.9.4 to board fabrication.	4年前
Michael Schloh von Bennewitz	c80ec05067	Correct electronic design rules check results pending imminent release.	4年前
Michael Schloh von Bennewitz	f143228cb3	Selectively remove paste apertures and replace hole cuts with drills.	4年前
Michael Schloh von Bennewitz	8e9ea6370a	Generate and curate parts list, panel design, and stencil foil.	4年前
Michael Schloh von Bennewitz	819a415fc9	Modify deprecated secure element model to new ATECC608B throughout.	4年前
Michael Schloh von Bennewitz	b969424881	Resolve #104 by removing unconnected vias from AE5 pad 1.	4年前
Michael Schloh von Bennewitz	bb8473ae5a	Complete production grade panelisation and foil design for LPKF frames.	4年前

15 コミット (45b3467dc19624486cdda6c1c25a00786e6c81c8)