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#74 Traces to JP2 and JP3 are wrong

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opened 3 years ago by Michael Schloh von Bennewitz · 1 comments
Michael Schloh von Bennewitz commented 3 years ago

Traces to JP2 and JP3 are wrong

Problem environment

UART connections connect half duplex signals over crossed traces, meaning a host transmits over a TX trace connected to the RX trace of a device.

Steps to reproduce

  1. Observe the schematic design
  2. Search the JP2/JP3 connectors
  3. Observe UART_TX and GPIO14/TXD

Expected result

  • UART_RX connects with GPIO14/TXD.
  • UART_TX connects with GPIO15/RXD.

Actual result

  • UART_RX connects with GPIO15/RXD.
  • UART_TX connects with GPIO14/TXD.

Workaround

The jumper layout specifies a male header, allowing to cross the connection appropriately using breadboard female wires.

Severity level

This is high priority because we expect most users to use the serial connection extensively.

# Traces to JP2 and JP3 are wrong ## Problem environment UART connections connect half duplex signals over crossed traces, meaning a host transmits over a TX trace connected to the RX trace of a device. ## Steps to reproduce 1. Observe the schematic design 1. Search the JP2/JP3 connectors 1. Observe UART_TX and GPIO14/TXD ## Expected result * UART_RX connects with **GPIO14/TXD**. * **UART_TX** connects with GPIO15/RXD. ## Actual result * UART_RX connects with GPIO15/RXD. * **UART_TX** connects with **GPIO14/TXD**. ## Workaround The jumper layout specifies a male header, allowing to cross the connection appropriately using breadboard female wires. ## Severity level This is **high priority** because we expect most users to use the serial connection extensively.
Michael Schloh von Bennewitz added the
bug
label 3 years ago
Michael Schloh von Bennewitz added this to the Target platform regression testing milestone 3 years ago
Michael Schloh von Bennewitz commented 3 years ago
Owner

Resolved in 8e36a89.

Resolved in 8e36a89.
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