Europalab Devices produces a LoRaWAN transmitting client node, specialised for higher research of actuator and sensor assisted IoT networks. https://dev.europalab.com/nlnet/20200000/
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Michael Schloh von Bennewitz 21a5e8909f Correct recent tolerance configuration with redundant via diamters. пре 4 година
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billofmat Correct syntax errors, replace false identifiers, and remove unpopulations. пре 4 година
fabplace Update the automated placement configuration accordingly. пре 4 година
fabprint Regenerate schematic designs for use in RF analysis and consultation. пре 4 година
libraries Modify deprecated secure element model to new ATECC608B throughout. пре 4 година
modules Resolve #154 again by correcting the 2mm and 1,6mm mounting holes to 1,8mm. пре 4 година
.gitignore Include positions for forthcoming tool configuration and machine import. пре 4 година
LICENSE Add project infrastructure files corresponding to hardware engineering. пре 5 година
conn-mchip.sch Improve to partially accommodate #147 bus power to backpower a host. пре 4 година
conn-stmicro.sch Bump version numbers pending panelisation and prepare to manufacture. пре 4 година
ctrl-mchip.sch Try a risky consolidation of switch circuits from 39 ohm series to 220. пре 4 година
ctrl-stmicro.sch Adjust schematic labels, relabel D8 designator to D3, and regenerate layout. пре 4 година
dscomm-cache.lib Implement design review suggestions to resolve #61 and #62. пре 4 година
dscomm-frame.kicad_pcb Resolve #154 again by correcting the 2mm and 1,6mm mounting holes to 1,8mm. пре 4 година
dscomm-panel.kicad_pcb Correct electronic design rules check results pending imminent release. пре 4 година
dscomm-panel.pro Complete production grade panelisation and foil design for LPKF frames. пре 4 година
dscomm-stencil.kicad_pcb Selectively remove paste apertures and replace hole cuts with drills. пре 4 година
dscomm-stencil.pro Complete production grade panelisation and foil design for LPKF frames. пре 4 година
dscomm-tstjig.kicad_pcb Add a specifications based representation of a J-Link mini device. пре 4 година
dscomm-tstjig.pro Add mounting holes to the test jig and avoid upside down text in panels. пре 4 година
dscomm.kicad_pcb Set default track width, spacing, via size, and hole diameters suitably. пре 4 година
dscomm.net Try a risky consolidation of switch circuits from 39 ohm series to 220. пре 4 година
dscomm.pro Correct recent tolerance configuration with redundant via diamters. пре 4 година
dscomm.sch Reposition fiducials according to automation test results, and add FID6. пре 4 година
elabdev-black.kicad_wks Include more project boilerplate structure and library cache. пре 4 година
elabdev-white.kicad_wks Include more project boilerplate structure and library cache. пре 4 година
feat-mchip.sch Resolve #164 by consolidating most parts in the comment suggestion. пре 4 година
form-arduino.kicad_pcb Bump hardware revision number pending tag for design review. пре 4 година
form-arduino.pro Complete milestone 'Blank FR4 design' for remaining device formats. пре 4 година
form-arduino.sch Bump version numbers pending panelisation and prepare to manufacture. пре 4 година
form-beagle.kicad_pcb Bump hardware revision number pending tag for design review. пре 4 година
form-beagle.pro Complete milestone 'Blank FR4 design' for remaining device formats. пре 4 година
form-beagle.sch Bump version numbers pending panelisation and prepare to manufacture. пре 4 година
form-bmicro.kicad_pcb Bump hardware revision number pending tag for design review. пре 4 година
form-bmicro.pro Redevelop, correct corners, and add connections to format variants. пре 4 година
form-bmicro.sch Bump version numbers pending panelisation and prepare to manufacture. пре 4 година
form-frdm.kicad_pcb Bump hardware revision number pending tag for design review. пре 4 година
form-frdm.pro Redevelop, correct corners, and add connections to format variants. пре 4 година
form-frdm.sch Bump version numbers pending panelisation and prepare to manufacture. пре 4 година
fp-lib-table Redesign for STM32WL SoC architecture, add features, and bump version. пре 4 година
pwr-stmicro.sch Bump version numbers pending panelisation and prepare to manufacture. пре 4 година
rfsw-mchip.sch Work on #141 by integrating pi networks to match impedence in antennas. пре 4 година
rfsw-stmicro.sch Bump version numbers pending panelisation and prepare to manufacture. пре 4 година
sym-lib-table Integrate local symbols and footprint libraries pending components. пре 4 година