Europalab Devices produces a LoRaWAN transmitting client node, specialised for higher research of actuator and sensor assisted IoT networks. https://dev.europalab.com/nlnet/20200000/
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Michael Schloh von Bennewitz 2287982aa1 Improve descriptive text on prototype assembly frame top layer. пре 4 година
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billofmat Correct spelling of unique parts and regenerate portable document format. пре 4 година
fabplace Update the automated placement configuration accordingly. пре 4 година
fabprint Correct spelling of unique parts and regenerate portable document format. пре 4 година
libraries Modify deprecated secure element model to new ATECC608B throughout. пре 4 година
modules Resolve #154 again by correcting the 2mm and 1,6mm mounting holes to 1,8mm. пре 4 година
.gitignore Include positions for forthcoming tool configuration and machine import. пре 4 година
LICENSE Add project infrastructure files corresponding to hardware engineering. пре 5 година
conn-mchip.sch Bump revision numbers, dates, and copyright pending release to manufacturing. пре 4 година
conn-stmicro.sch Bump revision numbers, dates, and copyright pending release to manufacturing. пре 4 година
ctrl-mchip.sch Bump revision numbers, dates, and copyright pending release to manufacturing. пре 4 година
ctrl-stmicro.sch Bump revision numbers, dates, and copyright pending release to manufacturing. пре 4 година
dscomm-cache.lib Implement design review suggestions to resolve #61 and #62. пре 4 година
dscomm-frame.kicad_pcb Bump revision numbers, dates, and copyright pending release to manufacturing. пре 4 година
dscomm-panel.kicad_pcb Bump revision numbers, dates, and copyright pending release to manufacturing. пре 4 година
dscomm-panel.pro Bump revision numbers, dates, and copyright pending release to manufacturing. пре 4 година
dscomm-stencil.kicad_pcb Bump revision numbers, dates, and copyright pending release to manufacturing. пре 4 година
dscomm-stencil.pro Bump revision numbers, dates, and copyright pending release to manufacturing. пре 4 година
dscomm-tstjig.kicad_pcb Bump revision numbers, dates, and copyright pending release to manufacturing. пре 4 година
dscomm-tstjig.pro Add mounting holes to the test jig and avoid upside down text in panels. пре 4 година
dscomm.kicad_pcb Improve descriptive text on prototype assembly frame top layer. пре 4 година
dscomm.net Bump revision numbers, dates, and copyright pending release to manufacturing. пре 4 година
dscomm.pro Correct recent tolerance configuration with redundant via diamters. пре 4 година
dscomm.sch Bump revision numbers, dates, and copyright pending release to manufacturing. пре 4 година
elabdev-black.kicad_wks Include more project boilerplate structure and library cache. пре 4 година
elabdev-white.kicad_wks Include more project boilerplate structure and library cache. пре 4 година
feat-mchip.sch Bump revision numbers, dates, and copyright pending release to manufacturing. пре 4 година
form-arduino.kicad_pcb Bump hardware revision number pending tag for design review. пре 4 година
form-arduino.pro Complete milestone 'Blank FR4 design' for remaining device formats. пре 4 година
form-arduino.sch Bump revision numbers, dates, and copyright pending release to manufacturing. пре 4 година
form-beagle.kicad_pcb Bump hardware revision number pending tag for design review. пре 4 година
form-beagle.pro Complete milestone 'Blank FR4 design' for remaining device formats. пре 4 година
form-beagle.sch Bump revision numbers, dates, and copyright pending release to manufacturing. пре 4 година
form-bmicro.kicad_pcb Bump hardware revision number pending tag for design review. пре 4 година
form-bmicro.pro Redevelop, correct corners, and add connections to format variants. пре 4 година
form-bmicro.sch Bump revision numbers, dates, and copyright pending release to manufacturing. пре 4 година
form-frdm.kicad_pcb Bump hardware revision number pending tag for design review. пре 4 година
form-frdm.pro Redevelop, correct corners, and add connections to format variants. пре 4 година
form-frdm.sch Bump revision numbers, dates, and copyright pending release to manufacturing. пре 4 година
fp-lib-table Redesign for STM32WL SoC architecture, add features, and bump version. пре 4 година
pwr-stmicro.sch Bump revision numbers, dates, and copyright pending release to manufacturing. пре 4 година
rfsw-mchip.sch Bump revision numbers, dates, and copyright pending release to manufacturing. пре 4 година
rfsw-stmicro.sch Bump revision numbers, dates, and copyright pending release to manufacturing. пре 4 година
sym-lib-table Integrate local symbols and footprint libraries pending components. пре 4 година