| .. |
|
billofmat
|
Correct flawed U2 package size and bump revision pending release.
|
4年前 |
|
fabplace
|
Include bottom layer positions for tool configuration and machine import.
|
4年前 |
|
libraries
|
Redevelop, correct corners, and add connections to format variants.
|
4年前 |
|
modules
|
Complete milestone 'Blank FR4 design' for remaining device formats.
|
4年前 |
|
.gitignore
|
Include positions for forthcoming tool configuration and machine import.
|
4年前 |
|
LICENSE
|
Add project infrastructure files corresponding to hardware engineering.
|
5年前 |
|
conn-mchip.sch
|
Redevelop, correct corners, and add connections to format variants.
|
4年前 |
|
conn-stmicro.sch
|
Redevelop, correct corners, and add connections to format variants.
|
4年前 |
|
ctrl-mchip.sch
|
Redevelop, correct corners, and add connections to format variants.
|
4年前 |
|
ctrl-stmicro.sch
|
Redevelop, correct corners, and add connections to format variants.
|
4年前 |
|
dscomm-cache.lib
|
Redevelop, correct corners, and add connections to format variants.
|
4年前 |
|
dscomm-panel.kicad_pcb
|
Complete production grade panelisation and foil design for LPKF frames.
|
4年前 |
|
dscomm-panel.pro
|
Complete production grade panelisation and foil design for LPKF frames.
|
4年前 |
|
dscomm-stencil.kicad_pcb
|
Complete production grade panelisation and foil design for LPKF frames.
|
4年前 |
|
dscomm-stencil.pro
|
Complete production grade panelisation and foil design for LPKF frames.
|
4年前 |
|
dscomm.kicad_pcb
|
Correct misplaced designator text label rotated in the last commit.
|
4年前 |
|
dscomm.net
|
Redevelop, correct corners, and add connections to format variants.
|
4年前 |
|
dscomm.pro
|
Adjust track width, via drills, and annular rings to minimum specs.
|
4年前 |
|
dscomm.sch
|
Complete milestone 'Blank FR4 design' for remaining device formats.
|
4年前 |
|
elabdev-black.kicad_wks
|
Include more project boilerplate structure and library cache.
|
4年前 |
|
elabdev-white.kicad_wks
|
Include more project boilerplate structure and library cache.
|
4年前 |
|
feat-mchip.sch
|
Redevelop, correct corners, and add connections to format variants.
|
4年前 |
|
form-arduino.kicad_pcb
|
Redevelop, correct corners, and add connections to format variants.
|
4年前 |
|
form-arduino.pro
|
Complete milestone 'Blank FR4 design' for remaining device formats.
|
4年前 |
|
form-arduino.sch
|
Redevelop, correct corners, and add connections to format variants.
|
4年前 |
|
form-beagle.kicad_pcb
|
Complete milestone 'Blank FR4 design' for remaining device formats.
|
4年前 |
|
form-beagle.pro
|
Complete milestone 'Blank FR4 design' for remaining device formats.
|
4年前 |
|
form-beagle.sch
|
Redevelop, correct corners, and add connections to format variants.
|
4年前 |
|
form-bmicro.kicad_pcb
|
Redevelop, correct corners, and add connections to format variants.
|
4年前 |
|
form-bmicro.pro
|
Redevelop, correct corners, and add connections to format variants.
|
4年前 |
|
form-bmicro.sch
|
Redevelop, correct corners, and add connections to format variants.
|
4年前 |
|
form-frdm.kicad_pcb
|
Redevelop, correct corners, and add connections to format variants.
|
4年前 |
|
form-frdm.pro
|
Redevelop, correct corners, and add connections to format variants.
|
4年前 |
|
form-frdm.sch
|
Redevelop, correct corners, and add connections to format variants.
|
4年前 |
|
fp-lib-table
|
Redesign for STM32WL SoC architecture, add features, and bump version.
|
4年前 |
|
pwr-stmicro.sch
|
Redevelop, correct corners, and add connections to format variants.
|
4年前 |
|
rfsw-mchip.sch
|
Redevelop, correct corners, and add connections to format variants.
|
4年前 |
|
rfsw-stmicro.sch
|
Redevelop, correct corners, and add connections to format variants.
|
4年前 |
|
sym-lib-table
|
Integrate local symbols and footprint libraries pending components.
|
4年前 |
Michael Schloh von Bennewitz
40a2b218fe