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billofmat
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Refine calibration suggestion from 12pF to 15pF indicated by counter.
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пре 4 година |
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fabplace
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Modify deprecated secure element model to new ATECC608B throughout.
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пре 4 година |
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fabprint
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Update generated schematic output to correspond with current design.
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пре 4 година |
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libraries
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Modify deprecated secure element model to new ATECC608B throughout.
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пре 4 година |
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modules
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Complete milestone 'Blank FR4 design' for remaining device formats.
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пре 4 година |
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.gitignore
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Include positions for forthcoming tool configuration and machine import.
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пре 4 година |
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LICENSE
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Add project infrastructure files corresponding to hardware engineering.
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пре 5 година |
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conn-mchip.sch
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Implement design review suggestions to resolve #61 and #62.
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пре 4 година |
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conn-stmicro.sch
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Bump hardware revision number pending tag for design review.
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пре 4 година |
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ctrl-mchip.sch
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Refine calibration suggestion from 12pF to 15pF indicated by counter.
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пре 4 година |
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ctrl-stmicro.sch
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Bump hardware revision number pending tag for design review.
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пре 4 година |
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dscomm-cache.lib
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Implement design review suggestions to resolve #61 and #62.
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пре 4 година |
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dscomm-panel.kicad_pcb
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Modify deprecated secure element model to new ATECC608B throughout.
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пре 4 година |
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dscomm-panel.pro
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Complete production grade panelisation and foil design for LPKF frames.
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пре 4 година |
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dscomm-stencil.kicad_pcb
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Modify deprecated secure element model to new ATECC608B throughout.
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пре 4 година |
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dscomm-stencil.pro
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Complete production grade panelisation and foil design for LPKF frames.
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пре 4 година |
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dscomm.kicad_pcb
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Adjust position of external display connection cutout on board bottom.
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пре 4 година |
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dscomm.net
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Add holes for hackfield, antenna legend, and correct enclosure hinges.
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пре 4 година |
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dscomm.pro
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Implement design review suggestions to resolve #61 and #62.
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пре 4 година |
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dscomm.sch
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Implement design review suggestions to resolve #61 and #62.
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пре 4 година |
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elabdev-black.kicad_wks
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Include more project boilerplate structure and library cache.
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пре 4 година |
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elabdev-white.kicad_wks
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Include more project boilerplate structure and library cache.
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пре 4 година |
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feat-mchip.sch
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Bump hardware revision number pending tag for design review.
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пре 4 година |
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form-arduino.kicad_pcb
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Bump hardware revision number pending tag for design review.
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пре 4 година |
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form-arduino.pro
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Complete milestone 'Blank FR4 design' for remaining device formats.
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пре 4 година |
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form-arduino.sch
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Bump hardware revision number pending tag for design review.
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пре 4 година |
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form-beagle.kicad_pcb
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Bump hardware revision number pending tag for design review.
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пре 4 година |
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form-beagle.pro
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Complete milestone 'Blank FR4 design' for remaining device formats.
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пре 4 година |
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form-beagle.sch
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Bump hardware revision number pending tag for design review.
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пре 4 година |
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form-bmicro.kicad_pcb
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Bump hardware revision number pending tag for design review.
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пре 4 година |
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form-bmicro.pro
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Redevelop, correct corners, and add connections to format variants.
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пре 4 година |
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form-bmicro.sch
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Bump hardware revision number pending tag for design review.
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пре 4 година |
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form-frdm.kicad_pcb
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Bump hardware revision number pending tag for design review.
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пре 4 година |
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form-frdm.pro
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Redevelop, correct corners, and add connections to format variants.
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пре 4 година |
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form-frdm.sch
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Bump hardware revision number pending tag for design review.
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пре 4 година |
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fp-lib-table
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Redesign for STM32WL SoC architecture, add features, and bump version.
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пре 4 година |
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pwr-stmicro.sch
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Bump hardware revision number pending tag for design review.
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пре 4 година |
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rfsw-mchip.sch
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Bump hardware revision number pending tag for design review.
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пре 4 година |
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rfsw-stmicro.sch
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Bump hardware revision number pending tag for design review.
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пре 4 година |
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sym-lib-table
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Integrate local symbols and footprint libraries pending components.
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пре 4 година |
Michael Schloh von Bennewitz
8eebf51cfb