Europalab Devices produces a LoRaWAN transmitting client node, specialised for higher research of actuator and sensor assisted IoT networks. https://dev.europalab.com/nlnet/20200000/
You can not select more than 25 topics Topics must start with a letter or number, can include dashes ('-') and can be up to 35 characters long.
Michael Schloh von Bennewitz af5147cf78 Correct superfluous placeholder entry (remaining after consolidation.) пре 4 година
..
billofmat Correct superfluous placeholder entry (remaining after consolidation.) пре 4 година
fabplace Configure the tape reel positions and their feed box mappings. пре 4 година
fabprint Correct superfluous placeholder entry (remaining after consolidation.) пре 4 година
libraries Modify deprecated secure element model to new ATECC608B throughout. пре 4 година
modules Solve the problem causing a layout error (79794b0) in the part footprint. пре 4 година
.gitignore Include positions for forthcoming tool configuration and machine import. пре 4 година
LICENSE Add project infrastructure files corresponding to hardware engineering. пре 5 година
conn-mchip.sch Modify and consolidate both ferrite beads according to manufacturer advice. пре 4 година
conn-stmicro.sch Bump revision numbers, dates, and copyright pending release to manufacturing. пре 4 година
ctrl-mchip.sch Modify and consolidate both ferrite beads according to manufacturer advice. пре 4 година
ctrl-stmicro.sch Bump revision numbers, dates, and copyright pending release to manufacturing. пре 4 година
dscomm-cache.lib Implement design review suggestions to resolve #61 and #62. пре 4 година
dscomm-frame.kicad_pcb Bump revision numbers, dates, and copyright pending release to manufacturing. пре 4 година
dscomm-panel.kicad_pcb Recorrect format from PDF to Gerber RS-274X and repaint pour hatches. пре 4 година
dscomm-panel.pro Bump revision numbers, dates, and copyright pending release to manufacturing. пре 4 година
dscomm-stencil.kicad_pcb Regenerate foil apertures to match panel corrections near J4 connector. пре 4 година
dscomm-stencil.pro Bump revision numbers, dates, and copyright pending release to manufacturing. пре 4 година
dscomm-tstjig.kicad_pcb Bump revision numbers, dates, and copyright pending release to manufacturing. пре 4 година
dscomm-tstjig.pro Add mounting holes to the test jig and avoid upside down text in panels. пре 4 година
dscomm.kicad_pcb Correct the mask clearance for the RF switch causing a paste problem. пре 4 година
dscomm.net Modify and consolidate both ferrite beads according to manufacturer advice. пре 4 година
dscomm.pro Correct recent tolerance configuration with redundant via diamters. пре 4 година
dscomm.sch Bump revision numbers, dates, and copyright pending release to manufacturing. пре 4 година
elabdev-black.kicad_wks Include more project boilerplate structure and library cache. пре 4 година
elabdev-white.kicad_wks Include more project boilerplate structure and library cache. пре 4 година
feat-mchip.sch Bump revision numbers, dates, and copyright pending release to manufacturing. пре 4 година
form-arduino.kicad_pcb Bump hardware revision number pending tag for design review. пре 4 година
form-arduino.pro Complete milestone 'Blank FR4 design' for remaining device formats. пре 4 година
form-arduino.sch Bump revision numbers, dates, and copyright pending release to manufacturing. пре 4 година
form-beagle.kicad_pcb Bump hardware revision number pending tag for design review. пре 4 година
form-beagle.pro Complete milestone 'Blank FR4 design' for remaining device formats. пре 4 година
form-beagle.sch Bump revision numbers, dates, and copyright pending release to manufacturing. пре 4 година
form-bmicro.kicad_pcb Bump hardware revision number pending tag for design review. пре 4 година
form-bmicro.pro Redevelop, correct corners, and add connections to format variants. пре 4 година
form-bmicro.sch Bump revision numbers, dates, and copyright pending release to manufacturing. пре 4 година
form-frdm.kicad_pcb Bump hardware revision number pending tag for design review. пре 4 година
form-frdm.pro Redevelop, correct corners, and add connections to format variants. пре 4 година
form-frdm.sch Bump revision numbers, dates, and copyright pending release to manufacturing. пре 4 година
fp-lib-table Redesign for STM32WL SoC architecture, add features, and bump version. пре 4 година
pwr-stmicro.sch Bump revision numbers, dates, and copyright pending release to manufacturing. пре 4 година
rfsw-mchip.sch Bump revision numbers, dates, and copyright pending release to manufacturing. пре 4 година
rfsw-stmicro.sch Bump revision numbers, dates, and copyright pending release to manufacturing. пре 4 година
sym-lib-table Integrate local symbols and footprint libraries pending components. пре 4 година