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billofmat
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Correct missing entry for line number two, by renumbering lines.
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4 роки тому |
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fabplace
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Update the automated placement configuration accordingly.
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4 роки тому |
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fabprint
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Regenerate schematic designs for use in RF analysis and consultation.
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4 роки тому |
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libraries
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Modify deprecated secure element model to new ATECC608B throughout.
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4 роки тому |
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modules
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Resolve #154 again by correcting the 2mm and 1,6mm mounting holes to 1,8mm.
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4 роки тому |
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.gitignore
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Include positions for forthcoming tool configuration and machine import.
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4 роки тому |
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LICENSE
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Add project infrastructure files corresponding to hardware engineering.
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5 роки тому |
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conn-mchip.sch
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Improve to partially accommodate #147 bus power to backpower a host.
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4 роки тому |
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conn-stmicro.sch
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Bump version numbers pending panelisation and prepare to manufacture.
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4 роки тому |
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ctrl-mchip.sch
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Try a risky consolidation of switch circuits from 39 ohm series to 220.
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4 роки тому |
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ctrl-stmicro.sch
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Adjust schematic labels, relabel D8 designator to D3, and regenerate layout.
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4 роки тому |
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dscomm-cache.lib
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Implement design review suggestions to resolve #61 and #62.
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4 роки тому |
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dscomm-frame.kicad_pcb
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Resolve #154 again by correcting the 2mm and 1,6mm mounting holes to 1,8mm.
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4 роки тому |
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dscomm-panel.kicad_pcb
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Correct electronic design rules check results pending imminent release.
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4 роки тому |
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dscomm-panel.pro
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Complete production grade panelisation and foil design for LPKF frames.
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4 роки тому |
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dscomm-stencil.kicad_pcb
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Selectively remove paste apertures and replace hole cuts with drills.
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4 роки тому |
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dscomm-stencil.pro
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Complete production grade panelisation and foil design for LPKF frames.
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4 роки тому |
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dscomm-tstjig.kicad_pcb
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Add a specifications based representation of a J-Link mini device.
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4 роки тому |
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dscomm-tstjig.pro
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Add mounting holes to the test jig and avoid upside down text in panels.
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4 роки тому |
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dscomm.kicad_pcb
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Integrate manufacturer advice from Johanson on AE5 corner placement.
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4 роки тому |
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dscomm.net
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Try a risky consolidation of switch circuits from 39 ohm series to 220.
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4 роки тому |
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dscomm.pro
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Correct recent tolerance configuration with redundant via diamters.
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4 роки тому |
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dscomm.sch
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Reposition fiducials according to automation test results, and add FID6.
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4 роки тому |
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elabdev-black.kicad_wks
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Include more project boilerplate structure and library cache.
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4 роки тому |
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elabdev-white.kicad_wks
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Include more project boilerplate structure and library cache.
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4 роки тому |
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feat-mchip.sch
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Resolve #164 by consolidating most parts in the comment suggestion.
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4 роки тому |
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form-arduino.kicad_pcb
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Bump hardware revision number pending tag for design review.
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4 роки тому |
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form-arduino.pro
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Complete milestone 'Blank FR4 design' for remaining device formats.
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4 роки тому |
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form-arduino.sch
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Bump version numbers pending panelisation and prepare to manufacture.
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4 роки тому |
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form-beagle.kicad_pcb
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Bump hardware revision number pending tag for design review.
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4 роки тому |
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form-beagle.pro
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Complete milestone 'Blank FR4 design' for remaining device formats.
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4 роки тому |
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form-beagle.sch
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Bump version numbers pending panelisation and prepare to manufacture.
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4 роки тому |
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form-bmicro.kicad_pcb
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Bump hardware revision number pending tag for design review.
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4 роки тому |
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form-bmicro.pro
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Redevelop, correct corners, and add connections to format variants.
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4 роки тому |
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form-bmicro.sch
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Bump version numbers pending panelisation and prepare to manufacture.
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4 роки тому |
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form-frdm.kicad_pcb
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Bump hardware revision number pending tag for design review.
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4 роки тому |
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form-frdm.pro
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Redevelop, correct corners, and add connections to format variants.
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4 роки тому |
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form-frdm.sch
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Bump version numbers pending panelisation and prepare to manufacture.
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4 роки тому |
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fp-lib-table
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Redesign for STM32WL SoC architecture, add features, and bump version.
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4 роки тому |
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pwr-stmicro.sch
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Bump version numbers pending panelisation and prepare to manufacture.
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4 роки тому |
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rfsw-mchip.sch
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Work on #141 by integrating pi networks to match impedence in antennas.
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4 роки тому |
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rfsw-stmicro.sch
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Bump version numbers pending panelisation and prepare to manufacture.
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4 роки тому |
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sym-lib-table
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Integrate local symbols and footprint libraries pending components.
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4 роки тому |
