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Europalab Devices produces a LoRaWAN transmitting client node, specialised for higher research of actuator and sensor assisted IoT networks. https://dev.europalab.com/nlnet/20200000/
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dsendcomm/hardware
Michael Schloh von Bennewitz f124b45881 Correct flawed connector symbol in schematic for SiP architecture. 4 years ago
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billofmat Add a comment collumn to accommodate do not place (DNP) parts. 4 years ago
libraries Redesign for STM32WL SoC architecture, add features, and bump version. 4 years ago
modules Redesign for STM32WL SoC architecture, add features, and bump version. 4 years ago
.gitignore Avoid tracking manufacturing archives and selectively copy to releases. 4 years ago
LICENSE Add project infrastructure files corresponding to hardware engineering. 5 years ago
conn-mchip.sch Correct flawed connector symbol in schematic for SiP architecture. 4 years ago
conn-stmicro.sch Redesign for STM32WL SoC architecture, add features, and bump version. 4 years ago
ctrl-mchip.sch Redesign for STM32WL SoC architecture, add features, and bump version. 4 years ago
ctrl-stmicro.sch Redesign for STM32WL SoC architecture, add features, and bump version. 4 years ago
dscomm-cache.lib Redesign for STM32WL SoC architecture, add features, and bump version. 4 years ago
dscomm.kicad_pcb Redesign for STM32WL SoC architecture, add features, and bump version. 4 years ago
dscomm.net Redesign for STM32WL SoC architecture, add features, and bump version. 4 years ago
dscomm.pro Adjust track width, via drills, and annular rings to minimum specs. 4 years ago
dscomm.sch Redesign for STM32WL SoC architecture, add features, and bump version. 4 years ago
elabdev-black.kicad_wks Include more project boilerplate structure and library cache. 4 years ago
elabdev-white.kicad_wks Include more project boilerplate structure and library cache. 4 years ago
feat-mchip.sch Redesign for STM32WL SoC architecture, add features, and bump version. 4 years ago
fp-lib-table Redesign for STM32WL SoC architecture, add features, and bump version. 4 years ago
pwr-stmicro.sch Redesign for STM32WL SoC architecture, add features, and bump version. 4 years ago
rfsw-mchip.sch Redesign for STM32WL SoC architecture, add features, and bump version. 4 years ago
rfsw-stmicro.sch Redesign for STM32WL SoC architecture, add features, and bump version. 4 years ago
sym-lib-table Integrate local symbols and footprint libraries pending components. 4 years ago