Europalab Devices produces a LoRaWAN transmitting client node, specialised for higher research of actuator and sensor assisted IoT networks. https://dev.europalab.com/nlnet/20200000/
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Michael Schloh von Bennewitz f4a7a6cc9f Bump version numbers pending panelisation and prepare to manufacture. пре 4 година
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billofmat Correct USB bus power circuit according to reference design and adjust. пре 4 година
fabplace Modify deprecated secure element model to new ATECC608B throughout. пре 4 година
fabprint Update generated schematic output to correspond with current design. пре 4 година
libraries Modify deprecated secure element model to new ATECC608B throughout. пре 4 година
modules Complete milestone 'Blank FR4 design' for remaining device formats. пре 4 година
.gitignore Include positions for forthcoming tool configuration and machine import. пре 4 година
LICENSE Add project infrastructure files corresponding to hardware engineering. пре 5 година
conn-mchip.sch Bump version numbers pending panelisation and prepare to manufacture. пре 4 година
conn-stmicro.sch Bump version numbers pending panelisation and prepare to manufacture. пре 4 година
ctrl-mchip.sch Bump version numbers pending panelisation and prepare to manufacture. пре 4 година
ctrl-stmicro.sch Bump version numbers pending panelisation and prepare to manufacture. пре 4 година
dscomm-cache.lib Implement design review suggestions to resolve #61 and #62. пре 4 година
dscomm-panel.kicad_pcb Modify deprecated secure element model to new ATECC608B throughout. пре 4 година
dscomm-panel.pro Complete production grade panelisation and foil design for LPKF frames. пре 4 година
dscomm-stencil.kicad_pcb Modify deprecated secure element model to new ATECC608B throughout. пре 4 година
dscomm-stencil.pro Complete production grade panelisation and foil design for LPKF frames. пре 4 година
dscomm.kicad_pcb Bump version numbers pending panelisation and prepare to manufacture. пре 4 година
dscomm.net Bump version numbers pending panelisation and prepare to manufacture. пре 4 година
dscomm.pro Implement design review suggestions to resolve #61 and #62. пре 4 година
dscomm.sch Bump version numbers pending panelisation and prepare to manufacture. пре 4 година
elabdev-black.kicad_wks Include more project boilerplate structure and library cache. пре 4 година
elabdev-white.kicad_wks Include more project boilerplate structure and library cache. пре 4 година
feat-mchip.sch Bump version numbers pending panelisation and prepare to manufacture. пре 4 година
form-arduino.kicad_pcb Bump hardware revision number pending tag for design review. пре 4 година
form-arduino.pro Complete milestone 'Blank FR4 design' for remaining device formats. пре 4 година
form-arduino.sch Bump version numbers pending panelisation and prepare to manufacture. пре 4 година
form-beagle.kicad_pcb Bump hardware revision number pending tag for design review. пре 4 година
form-beagle.pro Complete milestone 'Blank FR4 design' for remaining device formats. пре 4 година
form-beagle.sch Bump version numbers pending panelisation and prepare to manufacture. пре 4 година
form-bmicro.kicad_pcb Bump hardware revision number pending tag for design review. пре 4 година
form-bmicro.pro Redevelop, correct corners, and add connections to format variants. пре 4 година
form-bmicro.sch Bump version numbers pending panelisation and prepare to manufacture. пре 4 година
form-frdm.kicad_pcb Bump hardware revision number pending tag for design review. пре 4 година
form-frdm.pro Redevelop, correct corners, and add connections to format variants. пре 4 година
form-frdm.sch Bump version numbers pending panelisation and prepare to manufacture. пре 4 година
fp-lib-table Redesign for STM32WL SoC architecture, add features, and bump version. пре 4 година
pwr-stmicro.sch Bump version numbers pending panelisation and prepare to manufacture. пре 4 година
rfsw-mchip.sch Bump version numbers pending panelisation and prepare to manufacture. пре 4 година
rfsw-stmicro.sch Bump version numbers pending panelisation and prepare to manufacture. пре 4 година
sym-lib-table Integrate local symbols and footprint libraries pending components. пре 4 година