Europalab Devices produces a LoRaWAN transmitting client node, specialised for higher research of actuator and sensor assisted IoT networks. https://dev.europalab.com/nlnet/20200000/
選択できるのは25トピックまでです。 トピックは、先頭が英数字で、英数字とダッシュ('-')を使用した35文字以内のものにしてください。
Michael Schloh von Bennewitz fb71af7c10 Resolve #160 by laboriously rerouting test point trace to an unsused pin. 4年前
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billofmat Correct load capacitor values for LSE and modify HSE on assumptions. 4年前
fabplace Modify tape feeder pick configuration to improve handling of parts. 4年前
fabprint Regenerate portable document format schematic capture for update. 4年前
libraries Modify deprecated secure element model to new ATECC608B throughout. 4年前
modules Resolve #154 again by correcting the 2mm and 1,6mm mounting holes to 1,8mm. 4年前
.gitignore Include positions for forthcoming tool configuration and machine import. 4年前
LICENSE Add project infrastructure files corresponding to hardware engineering. 5年前
conn-mchip.sch Improve to partially accommodate #147 bus power to backpower a host. 4年前
conn-stmicro.sch Bump version numbers pending panelisation and prepare to manufacture. 4年前
ctrl-mchip.sch Resolve #160 by laboriously rerouting test point trace to an unsused pin. 4年前
ctrl-stmicro.sch Adjust schematic labels, relabel D8 designator to D3, and regenerate layout. 4年前
dscomm-cache.lib Implement design review suggestions to resolve #61 and #62. 4年前
dscomm-frame.kicad_pcb Resolve #154 again by correcting the 2mm and 1,6mm mounting holes to 1,8mm. 4年前
dscomm-panel.kicad_pcb Correct electronic design rules check results pending imminent release. 4年前
dscomm-panel.pro Complete production grade panelisation and foil design for LPKF frames. 4年前
dscomm-stencil.kicad_pcb Selectively remove paste apertures and replace hole cuts with drills. 4年前
dscomm-stencil.pro Complete production grade panelisation and foil design for LPKF frames. 4年前
dscomm-tstjig.kicad_pcb Add a specifications based representation of a J-Link mini device. 4年前
dscomm-tstjig.pro Add mounting holes to the test jig and avoid upside down text in panels. 4年前
dscomm.kicad_pcb Resolve #160 by laboriously rerouting test point trace to an unsused pin. 4年前
dscomm.net Resolve #160 by laboriously rerouting test point trace to an unsused pin. 4年前
dscomm.pro Increase track widths and reduce (sloppy) vias in RF paths to antennas. 4年前
dscomm.sch Reposition fiducials according to automation test results, and add FID6. 4年前
elabdev-black.kicad_wks Include more project boilerplate structure and library cache. 4年前
elabdev-white.kicad_wks Include more project boilerplate structure and library cache. 4年前
feat-mchip.sch Resolve #164 by consolidating most parts in the comment suggestion. 4年前
form-arduino.kicad_pcb Bump hardware revision number pending tag for design review. 4年前
form-arduino.pro Complete milestone 'Blank FR4 design' for remaining device formats. 4年前
form-arduino.sch Bump version numbers pending panelisation and prepare to manufacture. 4年前
form-beagle.kicad_pcb Bump hardware revision number pending tag for design review. 4年前
form-beagle.pro Complete milestone 'Blank FR4 design' for remaining device formats. 4年前
form-beagle.sch Bump version numbers pending panelisation and prepare to manufacture. 4年前
form-bmicro.kicad_pcb Bump hardware revision number pending tag for design review. 4年前
form-bmicro.pro Redevelop, correct corners, and add connections to format variants. 4年前
form-bmicro.sch Bump version numbers pending panelisation and prepare to manufacture. 4年前
form-frdm.kicad_pcb Bump hardware revision number pending tag for design review. 4年前
form-frdm.pro Redevelop, correct corners, and add connections to format variants. 4年前
form-frdm.sch Bump version numbers pending panelisation and prepare to manufacture. 4年前
fp-lib-table Redesign for STM32WL SoC architecture, add features, and bump version. 4年前
pwr-stmicro.sch Bump version numbers pending panelisation and prepare to manufacture. 4年前
rfsw-mchip.sch Work on #141 by integrating pi networks to match impedence in antennas. 4年前
rfsw-stmicro.sch Bump version numbers pending panelisation and prepare to manufacture. 4年前
sym-lib-table Integrate local symbols and footprint libraries pending components. 4年前