NLNetfound
/
dsendcomm
2
2
Fork 0
Code Issues 82 Pull Requests 0 Releases 5 Wiki Activity
304 Commits
1 Branch
64MB
Branch: master
Branches Tags
${ item.name }
Create branch ${ searchTerm }
from 'master'
${ noResults }
Commit Graph

304 Commits (master)
 

Author SHA1 Message Date
  Michael Schloh von Bennewitz 98b1e69d93 Correct version number as indicated in silkscreen text. 3 years ago
  Michael Schloh von Bennewitz 1c8ea4862a Implement design review suggestions to resolve #61 and #62. 3 years ago
  Michael Schloh von Bennewitz 73a6ed98bc Add a test point to allow LSE crystal output redirection to a MCU pin. 3 years ago
  Michael Schloh von Bennewitz 95df65933d Resolve #128 by rerouting bus power to PA07 F3 to bus test circuit. 3 years ago
  Michael Schloh von Bennewitz e14d4526eb Calibrate crystal circuits by trial and error pending spectrum analysis. 3 years ago
  Michael Schloh von Bennewitz 799c6fe772 Calibrate crystal circuits by trial and error pending spectrum analysis. 3 years ago
  Michael Schloh von Bennewitz 1f2fe604d8 Connect pads from pogo pin test matrix to GND and 3V3 to future proof. 3 years ago
  Michael Schloh von Bennewitz afa5216e09 Resolve #122 by removing AE7 and JP10 from the layout, and add a PWR LED. 3 years ago
  Michael Schloh von Bennewitz d772d2f788 Resolve #83 after tests indicate MLS correctly supplies power from PA09. 3 years ago
  Michael Schloh von Bennewitz a6fcbdf613 Resolve bug report #118 by replacing 10pF with 7pF load capacitors. 3 years ago
  Michael Schloh von Bennewitz 8c6be81782 Update generated schematic output to correspond with current design. 3 years ago
  Michael Schloh von Bennewitz 89c95b975f Bump hardware revision number pending tag for design review. 3 years ago
  Michael Schloh von Bennewitz 8c114dd4b4 Correct optional PA14_XIN and PA15_XOUT external crystal floating pins. 3 years ago
  Michael Schloh von Bennewitz 52eec91b20 Correct HSE circuit and remove JP26, add RFSW testpoints and text. 3 years ago
  Michael Schloh von Bennewitz 7c358ddd46 Resolve #114 by replacing flawed 27 pF value with 2,7 pF throughout. 3 years ago
  Michael Schloh von Bennewitz 68066fe6a9 Include a portable document format rendition of the schematic. 3 years ago
  Michael Schloh von Bennewitz b6cc59333c Correct secure element model number to support easy TTN integration. 3 years ago
  Michael Schloh von Bennewitz 819a415fc9 Modify deprecated secure element model to new ATECC608B throughout. 3 years ago
  Michael Schloh von Bennewitz f6764b5d5e Add top layer test points to connect with bottom layer solder grid. 3 years ago
  Michael Schloh von Bennewitz b969424881 Resolve #104 by removing unconnected vias from AE5 pad 1. 3 years ago
  Michael Schloh von Bennewitz 40a2b218fe Redevelop, correct corners, and add connections to format variants. 3 years ago
  Michael Schloh von Bennewitz 060584f6bc Complete milestone 'Blank FR4 design' for remaining device formats. 3 years ago
  Michael Schloh von Bennewitz bb8473ae5a Complete production grade panelisation and foil design for LPKF frames. 3 years ago
  Michael Schloh von Bennewitz 6697d42f59 Correct misplaced designator text label rotated in the last commit. 3 years ago
  Michael Schloh von Bennewitz 9a29ebfc09 Resolve #97 by redesigning the QFN-12 footprint used for the U4 RF switch. 3 years ago
  Michael Schloh von Bennewitz a2b385851b Add handwritten signature decorative text to bottom silkscreen. 3 years ago
  Michael Schloh von Bennewitz b727e44ef5 Resolve DRC errors and panelise irregular tabs for consistency. 3 years ago
  Michael Schloh von Bennewitz 62e6e0b06b Regenerate and commit the netlist reflecting the power flag addition. 3 years ago
  Michael Schloh von Bennewitz 0753ffa445 Resolve a false positive on ERC by adding a power flag to a supply input. 3 years ago
  Michael Schloh von Bennewitz 73d2e45c06 Improve continuity of the ground plane of the top layer by adding a via. 3 years ago
  Michael Schloh von Bennewitz dde5e9ffb4 Bump revision pending release to panelisation and imminent fabrication. 3 years ago
  Michael Schloh von Bennewitz 7c2b89e222 Correct flawed U2 package size and bump revision pending release. 3 years ago
  Michael Schloh von Bennewitz 3c10b0797f Modify placement of J1 battery power selection jumper to improve access. 3 years ago
  Michael Schloh von Bennewitz a66f58cfd3 Align placement of resistor at R3 to the existing resistor at R2. 3 years ago
  Michael Schloh von Bennewitz 55a0f50266 Resolve #71 by replacing the 0402 part with a same brand 0805 part. 3 years ago
  Michael Schloh von Bennewitz 0d38f32cf8 Reduce length of antenna selection jumper traces to improve signal. 3 years ago
  Michael Schloh von Bennewitz 6969e8e3f0 Complete partially implemented RF switch power selection jumper. 3 years ago
  Michael Schloh von Bennewitz 7da0bfb1b5 Connect spring contacts for daughterboard and add jumper to resolve #88. 3 years ago
  Michael Schloh von Bennewitz b4f491a6d1 Add a ambient light sensor circuit and route to the MCU. 3 years ago
  Michael Schloh von Bennewitz 06ee3e4234 Resolve #80 and #89 by adding a 1 uF decoupling capacitor and connector. 3 years ago
  Michael Schloh von Bennewitz 787e5fed89 Resolve #76 by replacing triangle solder jumper shapes with ovals. 3 years ago
  Michael Schloh von Bennewitz 7e32c82a2f Resolve #75 by replacing header pin footprints with solder jumpers. 3 years ago
  Michael Schloh von Bennewitz 8e36a89bf0 Resolve #72 and #74 by rerouting traces, jumpers, and pads. 3 years ago
  Michael Schloh von Bennewitz 5547c5c17c Correct bottom ground plane cohesion across island regions. 3 years ago
  Michael Schloh von Bennewitz d1de14d468 Resolve #81 and #82 by replacing oscillator circuit and inductors. 3 years ago
  Michael Schloh von Bennewitz fbd2c4d64f Include bottom layer positions for tool configuration and machine import. 3 years ago
  Michael Schloh von Bennewitz be68447c46 Improve position of bottom layer silkscreen text for designators. 3 years ago
  Michael Schloh von Bennewitz b568796a8b Include placer tooling configuration for forthcoming assembly step. 3 years ago
  Michael Schloh von Bennewitz ae8846b0ec Include positions for forthcoming tool configuration and machine import. 3 years ago
  Michael Schloh von Bennewitz 3729b8a295 Work around reference design flaw #58 by replacing with a ferrite bead. 3 years ago