 Michael Schloh von Bennewitz
|
a88a134751
|
Update existing schematics after modification and subsequent reannotation.
|
4 年之前 |
|
Michael Schloh von Bennewitz
|
37dbf8f109
|
Adequately improve and clarify power circuit design for bug #12.
|
4 年之前 |
|
Michael Schloh von Bennewitz
|
fc60477441
|
Correct poor abstraction bug #4 and generally complete Microchip circuits.
|
4 年之前 |
|
Michael Schloh von Bennewitz
|
33e82abaa5
|
Add missing antenna footprints, in use during layout design.
|
4 年之前 |
|
Michael Schloh von Bennewitz
|
4a307de515
|
Add LDO voltage regulator to step down from 5V (Host/USB) to 3V3.
|
4 年之前 |
|
Michael Schloh von Bennewitz
|
d46e563e62
|
Add ECC authentication secure element for imminent schematic capture.
|
4 年之前 |
|
Michael Schloh von Bennewitz
|
a71b05cc81
|
Prepare for layout edition in BGA with corresponding traces and vias.
|
4 年之前 |
|
Michael Schloh von Bennewitz
|
ff52db338c
|
Annotate symbols, correct power circuits, and assign footprints.
|
4 年之前 |
|
Michael Schloh von Bennewitz
|
c2b37009ee
|
Add remaining circuits to almost complete minimum MCU application.
|
4 年之前 |
|
Michael Schloh von Bennewitz
|
202089cd61
|
Complete draft design of RF switch for power amplifier and HF circuits.
|
4 年之前 |
|
Michael Schloh von Bennewitz
|
8731ecd254
|
Create and add a SKY13373 RF switch with corresponding symbol and footprint.
|
4 年之前 |
|
Michael Schloh von Bennewitz
|
ea03063239
|
Initialise schematic hierarchy and add nested blocks for controller logic.
|
4 年之前 |
|
Michael Schloh von Bennewitz
|
0b005a0f67
|
Add very small crystal oscillator needed for microcontroller operation.
|
4 年之前 |
|
Michael Schloh von Bennewitz
|
65703b08da
|
Import test plan including test cases and unit tests.
|
4 年之前 |
|
Michael Schloh von Bennewitz
|
e7de86f1c5
|
Abstract static definitions out of source containing variable code.
|
4 年之前 |
|
Michael Schloh von Bennewitz
|
1ff923c3ff
|
Improve wording of project description in main information.
|
4 年之前 |
|
Michael Schloh von Bennewitz
|
1a467fcad1
|
Include GPIO blink source file for boilerplate and correct project.
|
4 年之前 |
|
Michael Schloh von Bennewitz
|
30a3c02dbf
|
Import firmware and new Platform IO project with VSCode artifacts.
|
4 年之前 |
|
Michael Schloh von Bennewitz
|
6076ee8863
|
Indicate UHF tranceiver and power functions completing symbols.
|
4 年之前 |
|
Michael Schloh von Bennewitz
|
425ff0092a
|
Add MCU part symbols and missing BGA footprint to project libraries.
|
4 年之前 |
|
Michael Schloh von Bennewitz
|
a2807cc2b2
|
Correct title text delimiters in the project layout file.
|
4 年之前 |
|
Michael Schloh von Bennewitz
|
41e5f095e8
|
Include more project boilerplate structure and library cache.
|
4 年之前 |
|
Michael Schloh von Bennewitz
|
65161c26fa
|
Integrate local symbols and footprint libraries pending components.
|
4 年之前 |
|
Michael Schloh von Bennewitz
|
56dfb433cc
|
Initialise hardware engineering for imminent schematic capture.
|
4 年之前 |
|
Michael Schloh von Bennewitz
|
e854067c78
|
Add project infrastructure files corresponding to hardware engineering.
|
5 年之前 |
|
Michael Schloh von Bennewitz
|
e2775cb8b6
|
Complete project initialisation including boilerplate information.
|
5 年之前 |
 Stichting NLnet
|
c6526cb842
|
Initial commit
|
5 年之前 |
