 Michael Schloh von Bennewitz
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659c316ae0
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Bump revision numbers, dates, and copyright pending release to manufacturing.
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il y a 4 ans |
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Michael Schloh von Bennewitz
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47cf21d85a
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Resolve #164 by consolidating most parts in the comment suggestion.
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il y a 4 ans |
 Michael Schloh von Bennewitz
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f4a7a6cc9f
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Bump version numbers pending panelisation and prepare to manufacture.
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il y a 4 ans |
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Michael Schloh von Bennewitz
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89c95b975f
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Bump hardware revision number pending tag for design review.
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il y a 4 ans |
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Michael Schloh von Bennewitz
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819a415fc9
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Modify deprecated secure element model to new ATECC608B throughout.
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il y a 4 ans |
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Michael Schloh von Bennewitz
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40a2b218fe
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Redevelop, correct corners, and add connections to format variants.
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il y a 4 ans |
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Michael Schloh von Bennewitz
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dde5e9ffb4
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Bump revision pending release to panelisation and imminent fabrication.
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il y a 4 ans |
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Michael Schloh von Bennewitz
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06be85075b
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Renumber and bump version pending layout edition of ST SoC migration.
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il y a 4 ans |
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Michael Schloh von Bennewitz
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e1e0f5c1d5
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Redesign for STM32WL SoC architecture, add features, and bump version.
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il y a 4 ans |
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Michael Schloh von Bennewitz
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44bdd2e1e4
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Bump hardware revision number pending release to manufacturing.
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il y a 4 ans |
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Michael Schloh von Bennewitz
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c0aa16f26e
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Resolve #35 add a board to board connector to prepare daughterboards.
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il y a 4 ans |
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Michael Schloh von Bennewitz
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6c7b76d799
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Bump hardware revision number pending milestone progress and test cycle.
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il y a 4 ans |
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Michael Schloh von Bennewitz
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636ecc14e6
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Correct flawed ground short in secure element authentication circuit.
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il y a 4 ans |
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Michael Schloh von Bennewitz
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2efab65f8a
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Add nested part to allow either DFN or SOIC secure elements to be used.
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il y a 4 ans |
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Michael Schloh von Bennewitz
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9364408811
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Correct footprint for Atmel secure element to comply with standards.
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il y a 4 ans |
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Michael Schloh von Bennewitz
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57d2b72b53
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Add test point loops and correct sized mounting holes.
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il y a 4 ans |
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Michael Schloh von Bennewitz
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2a1cbb6ddb
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Add nested part to allow either DFN or SOIC EEPROMs to be used.
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il y a 4 ans |
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Michael Schloh von Bennewitz
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69acaf3e33
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Add EEPROM, jumpers, and connector pending migration to hat format.
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il y a 4 ans |
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Michael Schloh von Bennewitz
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a88a134751
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Update existing schematics after modification and subsequent reannotation.
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il y a 4 ans |
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Michael Schloh von Bennewitz
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fc60477441
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Correct poor abstraction bug #4 and generally complete Microchip circuits.
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il y a 4 ans |
