 Michael Schloh von Bennewitz
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062c71befc
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Add a openocd(1) configuration, to enable user firmware programming.
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hace 4 años |
|
Michael Schloh von Bennewitz
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84c7614e99
|
Hack the horizontal J4 UART connector notation to accommodate an edge.
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hace 4 años |
|
Michael Schloh von Bennewitz
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f790aa3252
|
Reposition fiducials according to automation test results, and add FID6.
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hace 4 años |
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Michael Schloh von Bennewitz
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7f64df9903
|
Improve notations of programming connector headers avoiding JTAG.
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hace 4 años |
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Michael Schloh von Bennewitz
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8c965b9b90
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Modify tape feeder pick configuration to improve handling of parts.
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hace 4 años |
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Michael Schloh von Bennewitz
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7af8ba97f5
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Improve fiducial size, form, placement, and structure to resolve #145.
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hace 4 años |
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Michael Schloh von Bennewitz
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eb74067f05
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Add test points for USB data quality assurance (especially type C.)
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hace 4 años |
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Michael Schloh von Bennewitz
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a2e76541c1
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Remove MPLab Snap because it fails on all Opensource (GDB) applications.
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hace 4 años |
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Michael Schloh von Bennewitz
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c7e1804622
|
Add MPLab Snap and STLink V3Mini devices as candidate programmers.
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hace 4 años |
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Michael Schloh von Bennewitz
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d6f0deb432
|
Increase track widths and reduce (sloppy) vias in RF paths to antennas.
|
hace 4 años |
|
Michael Schloh von Bennewitz
|
1aa5ae7f55
|
Provisionally added chip programmer dimensions and hole spacing.
|
hace 4 años |
|
Michael Schloh von Bennewitz
|
02bbb27912
|
Remove paste from unpopulated chip antenna passive pads and clarify.
|
hace 4 años |
|
Michael Schloh von Bennewitz
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50e65f2bcb
|
Add mounting holes to the test jig and avoid upside down text in panels.
|
hace 4 años |
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Michael Schloh von Bennewitz
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d8106ebb3a
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Add structures and circuits to support forthcoming test jig construction.
|
hace 4 años |
|
Michael Schloh von Bennewitz
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4f9180baf2
|
Add configuration for a first revision of the education destined device.
|
hace 4 años |
|
Michael Schloh von Bennewitz
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fadea4cfdb
|
Add test, debug, and program files for hardware attached on top EEPROM.
|
hace 4 años |
|
Michael Schloh von Bennewitz
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70ff0c71ff
|
Develop the placement configuration pending assembly of release 0.9.2.
|
hace 4 años |
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Michael Schloh von Bennewitz
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5a29587d8e
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Work on #141 by integrating pi networks to match impedence in antennas.
|
hace 4 años |
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Michael Schloh von Bennewitz
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7927ab7047
|
Roughly inform of the code complete and release status pending production.
|
hace 4 años |
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Michael Schloh von Bennewitz
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fd8033c28a
|
Import project samples to illustrate hardware features in ARM firmware;
This addition resolves #111 and #112 and concludes milestone group 6.
|
hace 4 años |
|
Michael Schloh von Bennewitz
|
3b87055112
|
Import a sample solution and corresponding logic pending project import.
|
hace 4 años |
|
Michael Schloh von Bennewitz
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b5efdccec2
|
Clear area pending integration of current set of firmware projects.
|
hace 4 años |
|
Michael Schloh von Bennewitz
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b3b668c47c
|
Calibrate for tooling update to 0.9.2 and prepare for placments.
|
hace 4 años |
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Michael Schloh von Bennewitz
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c42820dfaa
|
Update according to latest state of the SMT assembly lab toolset.
|
hace 4 años |
|
Michael Schloh von Bennewitz
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dfae2135e6
|
Adjust label spacing slightly on designator text in the silkscreen.
|
hace 4 años |
|
Michael Schloh von Bennewitz
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c80ec05067
|
Correct electronic design rules check results pending imminent release.
|
hace 4 años |
|
Michael Schloh von Bennewitz
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035f934f79
|
Repour lost filled areas on all layers, forgotten in last commit.
|
hace 4 años |
|
Michael Schloh von Bennewitz
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e71589f739
|
Reshape and position the hack that silkscreen indicator bar.
|
hace 4 años |
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Michael Schloh von Bennewitz
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7d0f59100f
|
Add forgotten but used in layout replacement for cut holes a module.
|
hace 4 años |
|
Michael Schloh von Bennewitz
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898da4fa7c
|
Regenerate portable document format schematic capture for update.
|
hace 4 años |
|
Michael Schloh von Bennewitz
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f143228cb3
|
Selectively remove paste apertures and replace hole cuts with drills.
|
hace 4 años |
|
Michael Schloh von Bennewitz
|
8e9ea6370a
|
Generate and curate parts list, panel design, and stencil foil.
|
hace 4 años |
|
Michael Schloh von Bennewitz
|
3ba5b2870f
|
Add out of tree footprint module files for inclusion in manufacturing.
|
hace 4 años |
|
Michael Schloh von Bennewitz
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9702fcfc69
|
Improve name text of artist signature which was too long before.
|
hace 4 años |
|
Michael Schloh von Bennewitz
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719e193c1b
|
Add a 45mm large mousebite panel tab to accommodate enclosure hinges.
|
hace 4 años |
|
Michael Schloh von Bennewitz
|
9f370cd029
|
Annotate J5 and J20 according to their serial protocols in silkscreens.
|
hace 4 años |
|
Michael Schloh von Bennewitz
|
3dfc431d97
|
Mark the first JTAG SWD debug interface connector in the silkscreen.
|
hace 4 años |
|
Michael Schloh von Bennewitz
|
7d49528ff2
|
Reflect information from bug reports #129 and #130 pending VNA tests.
|
hace 4 años |
|
Michael Schloh von Bennewitz
|
f2ad7f7ead
|
Remove stray user drawing layer of a edge cut guidance horizontal bar.
|
hace 4 años |
 Michael Schloh von Bennewitz
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f4a7a6cc9f
|
Bump version numbers pending panelisation and prepare to manufacture.
|
hace 4 años |
|
Michael Schloh von Bennewitz
|
4f3db6f44a
|
Correct USB bus power circuit according to reference design and adjust.
|
hace 4 años |
|
Michael Schloh von Bennewitz
|
8eebf51cfb
|
Adjust position of external display connection cutout on board bottom.
|
hace 4 años |
|
Michael Schloh von Bennewitz
|
6040ddcdfa
|
Add holes for hackfield, antenna legend, and correct enclosure hinges.
|
hace 4 años |
|
Michael Schloh von Bennewitz
|
5bf1b6c077
|
Refine calibration suggestion from 12pF to 15pF indicated by counter.
|
hace 4 años |
|
Michael Schloh von Bennewitz
|
c4e91a8557
|
Update parts list according to recent corrections in schematic capture.
|
hace 4 años |
|
Michael Schloh von Bennewitz
|
98b1e69d93
|
Correct version number as indicated in silkscreen text.
|
hace 4 años |
|
Michael Schloh von Bennewitz
|
1c8ea4862a
|
Implement design review suggestions to resolve #61 and #62.
|
hace 4 años |
|
Michael Schloh von Bennewitz
|
73a6ed98bc
|
Add a test point to allow LSE crystal output redirection to a MCU pin.
|
hace 4 años |
|
Michael Schloh von Bennewitz
|
95df65933d
|
Resolve #128 by rerouting bus power to PA07 F3 to bus test circuit.
|
hace 4 años |
|
Michael Schloh von Bennewitz
|
e14d4526eb
|
Calibrate crystal circuits by trial and error pending spectrum analysis.
|
hace 4 años |
