 Michael Schloh von Bennewitz
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1697e5268f
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Record an out of scope concept to integrate FOMU in design to bookmark.
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4年前 |
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Michael Schloh von Bennewitz
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06be85075b
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Renumber and bump version pending layout edition of ST SoC migration.
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4年前 |
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Michael Schloh von Bennewitz
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e1e0f5c1d5
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Redesign for STM32WL SoC architecture, add features, and bump version.
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4年前 |
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Michael Schloh von Bennewitz
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44bdd2e1e4
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Bump hardware revision number pending release to manufacturing.
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4年前 |
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Michael Schloh von Bennewitz
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6c7b76d799
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Bump hardware revision number pending milestone progress and test cycle.
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4年前 |
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Michael Schloh von Bennewitz
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2fa32f80c2
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Add test points to allow flexible postassembly prototype debugging.
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4年前 |
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Michael Schloh von Bennewitz
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2aa746b314
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Add logos to schematic, that unfortunately do not fit in the layout.
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4年前 |
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Michael Schloh von Bennewitz
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dca0d14ff0
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Correct flawed net in cross connected serial wire debug contacts.
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4年前 |
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Michael Schloh von Bennewitz
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636ecc14e6
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Correct flawed ground short in secure element authentication circuit.
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4年前 |
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Michael Schloh von Bennewitz
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eedb5cdd42
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Improve mounting hole unit numbering by hand modifying identifiers.
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4年前 |
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Michael Schloh von Bennewitz
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57d2b72b53
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Add test point loops and correct sized mounting holes.
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4年前 |
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Michael Schloh von Bennewitz
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69acaf3e33
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Add EEPROM, jumpers, and connector pending migration to hat format.
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4年前 |
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Michael Schloh von Bennewitz
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54e8c2e73c
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Correct schematics after electric rules check results in warnings.
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4年前 |
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Michael Schloh von Bennewitz
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fc60477441
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Correct poor abstraction bug #4 and generally complete Microchip circuits.
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4年前 |
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Michael Schloh von Bennewitz
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ff52db338c
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Annotate symbols, correct power circuits, and assign footprints.
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4年前 |
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Michael Schloh von Bennewitz
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c2b37009ee
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Add remaining circuits to almost complete minimum MCU application.
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4年前 |
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Michael Schloh von Bennewitz
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202089cd61
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Complete draft design of RF switch for power amplifier and HF circuits.
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4年前 |
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Michael Schloh von Bennewitz
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ea03063239
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Initialise schematic hierarchy and add nested blocks for controller logic.
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4年前 |
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Michael Schloh von Bennewitz
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41e5f095e8
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Include more project boilerplate structure and library cache.
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4年前 |
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Michael Schloh von Bennewitz
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56dfb433cc
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Initialise hardware engineering for imminent schematic capture.
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4年前 |
