57 コミット (afa5216e09ad1bb4aaaff863f1099e88ee2090b5)

作成者 SHA1 メッセージ 日付
  Michael Schloh von Bennewitz afa5216e09 Resolve #122 by removing AE7 and JP10 from the layout, and add a PWR LED. 4年前
  Michael Schloh von Bennewitz d772d2f788 Resolve #83 after tests indicate MLS correctly supplies power from PA09. 4年前
  Michael Schloh von Bennewitz a6fcbdf613 Resolve bug report #118 by replacing 10pF with 7pF load capacitors. 4年前
  Michael Schloh von Bennewitz 89c95b975f Bump hardware revision number pending tag for design review. 4年前
  Michael Schloh von Bennewitz 8c114dd4b4 Correct optional PA14_XIN and PA15_XOUT external crystal floating pins. 4年前
  Michael Schloh von Bennewitz 52eec91b20 Correct HSE circuit and remove JP26, add RFSW testpoints and text. 4年前
  Michael Schloh von Bennewitz 7c358ddd46 Resolve #114 by replacing flawed 27 pF value with 2,7 pF throughout. 4年前
  Michael Schloh von Bennewitz 819a415fc9 Modify deprecated secure element model to new ATECC608B throughout. 4年前
  Michael Schloh von Bennewitz f6764b5d5e Add top layer test points to connect with bottom layer solder grid. 4年前
  Michael Schloh von Bennewitz b969424881 Resolve #104 by removing unconnected vias from AE5 pad 1. 4年前
  Michael Schloh von Bennewitz 6697d42f59 Correct misplaced designator text label rotated in the last commit. 4年前
  Michael Schloh von Bennewitz 9a29ebfc09 Resolve #97 by redesigning the QFN-12 footprint used for the U4 RF switch. 4年前
  Michael Schloh von Bennewitz a2b385851b Add handwritten signature decorative text to bottom silkscreen. 4年前
  Michael Schloh von Bennewitz b727e44ef5 Resolve DRC errors and panelise irregular tabs for consistency. 4年前
  Michael Schloh von Bennewitz 73d2e45c06 Improve continuity of the ground plane of the top layer by adding a via. 4年前
  Michael Schloh von Bennewitz 7c2b89e222 Correct flawed U2 package size and bump revision pending release. 4年前
  Michael Schloh von Bennewitz 3c10b0797f Modify placement of J1 battery power selection jumper to improve access. 4年前
  Michael Schloh von Bennewitz a66f58cfd3 Align placement of resistor at R3 to the existing resistor at R2. 4年前
  Michael Schloh von Bennewitz 55a0f50266 Resolve #71 by replacing the 0402 part with a same brand 0805 part. 4年前
  Michael Schloh von Bennewitz 0d38f32cf8 Reduce length of antenna selection jumper traces to improve signal. 4年前
  Michael Schloh von Bennewitz 6969e8e3f0 Complete partially implemented RF switch power selection jumper. 4年前
  Michael Schloh von Bennewitz 7da0bfb1b5 Connect spring contacts for daughterboard and add jumper to resolve #88. 4年前
  Michael Schloh von Bennewitz b4f491a6d1 Add a ambient light sensor circuit and route to the MCU. 4年前
  Michael Schloh von Bennewitz 06ee3e4234 Resolve #80 and #89 by adding a 1 uF decoupling capacitor and connector. 4年前
  Michael Schloh von Bennewitz 787e5fed89 Resolve #76 by replacing triangle solder jumper shapes with ovals. 4年前
  Michael Schloh von Bennewitz 7e32c82a2f Resolve #75 by replacing header pin footprints with solder jumpers. 4年前
  Michael Schloh von Bennewitz 8e36a89bf0 Resolve #72 and #74 by rerouting traces, jumpers, and pads. 4年前
  Michael Schloh von Bennewitz 5547c5c17c Correct bottom ground plane cohesion across island regions. 4年前
  Michael Schloh von Bennewitz d1de14d468 Resolve #81 and #82 by replacing oscillator circuit and inductors. 4年前
  Michael Schloh von Bennewitz be68447c46 Improve position of bottom layer silkscreen text for designators. 4年前
  Michael Schloh von Bennewitz 7e9d77859b Bump version number pending layout engineering of STM32WL SiP migration. 4年前
  Michael Schloh von Bennewitz e1e0f5c1d5 Redesign for STM32WL SoC architecture, add features, and bump version. 4年前
  Michael Schloh von Bennewitz cff212170b Add a paste layer to NPTH mounts to configure for foil apertures. 4年前
  Michael Schloh von Bennewitz 5da94c3830 Include a solderfield breadboard to support daughterboard development. 4年前
  Michael Schloh von Bennewitz c0aa16f26e Resolve #35 add a board to board connector to prepare daughterboards. 4年前
  Michael Schloh von Bennewitz f7c398852a Resolve #33 Align panel to Stencil8 by relocating mount holes slightly. 4年前
  Michael Schloh von Bennewitz d07d09c41a Increase parts count to 124, and connect all remaining circuits. 4年前
  Michael Schloh von Bennewitz 772f799d43 Connect power voltage and ground to bottom quarter of board parts. 4年前
  Michael Schloh von Bennewitz b7623201ba Dump layout regeneration after trying to design new test points. 4年前
  Michael Schloh von Bennewitz 4a6fe14ba6 Apply copper pours to all layers with ground nets except on layer 3. 4年前
  Michael Schloh von Bennewitz dc6f024b36 Remove pad to pad spacing tolerance error to almost completely correct. 4年前
  Michael Schloh von Bennewitz 4a041e91f9 Clean up vias, tracks, spacing, and remove redundant segments. 4年前
  Michael Schloh von Bennewitz fe06fd495f Adjust track width, via drills, and annular rings to minimum specs. 4年前
  Michael Schloh von Bennewitz 50ca6fbb0b Connect remaining USB data and UART data circuits for input output. 4年前
  Michael Schloh von Bennewitz dca0d14ff0 Correct flawed net in cross connected serial wire debug contacts. 4年前
  Michael Schloh von Bennewitz 7cadc14d8f Connect both LEDs to MCU pins for controlling user output. 4年前
  Michael Schloh von Bennewitz b639be76b3 Complete draft revision of the radio frequency switch circuit. 4年前
  Michael Schloh von Bennewitz 2063328cb1 Remove useless chip antenna which takes up more area than total size. 4年前
  Michael Schloh von Bennewitz b1fa69de4a Replace coin cell battery holder and move crystal to make room. 4年前
  Michael Schloh von Bennewitz 6daad3ba72 Complete most circuits pending layout of RF switch and passive arrays. 4年前