 Michael Schloh von Bennewitz
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f6764b5d5e
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Add top layer test points to connect with bottom layer solder grid.
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4 年之前 |
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Michael Schloh von Bennewitz
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b969424881
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Resolve #104 by removing unconnected vias from AE5 pad 1.
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4 年之前 |
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Michael Schloh von Bennewitz
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6697d42f59
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Correct misplaced designator text label rotated in the last commit.
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5 年之前 |
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Michael Schloh von Bennewitz
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9a29ebfc09
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Resolve #97 by redesigning the QFN-12 footprint used for the U4 RF switch.
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5 年之前 |
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Michael Schloh von Bennewitz
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a2b385851b
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Add handwritten signature decorative text to bottom silkscreen.
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5 年之前 |
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Michael Schloh von Bennewitz
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b727e44ef5
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Resolve DRC errors and panelise irregular tabs for consistency.
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5 年之前 |
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Michael Schloh von Bennewitz
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73d2e45c06
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Improve continuity of the ground plane of the top layer by adding a via.
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5 年之前 |
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Michael Schloh von Bennewitz
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7c2b89e222
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Correct flawed U2 package size and bump revision pending release.
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5 年之前 |
 Michael Schloh von Bennewitz
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3c10b0797f
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Modify placement of J1 battery power selection jumper to improve access.
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5 年之前 |
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Michael Schloh von Bennewitz
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a66f58cfd3
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Align placement of resistor at R3 to the existing resistor at R2.
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5 年之前 |
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Michael Schloh von Bennewitz
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55a0f50266
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Resolve #71 by replacing the 0402 part with a same brand 0805 part.
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5 年之前 |
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Michael Schloh von Bennewitz
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0d38f32cf8
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Reduce length of antenna selection jumper traces to improve signal.
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5 年之前 |
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Michael Schloh von Bennewitz
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6969e8e3f0
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Complete partially implemented RF switch power selection jumper.
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5 年之前 |
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Michael Schloh von Bennewitz
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7da0bfb1b5
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Connect spring contacts for daughterboard and add jumper to resolve #88.
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5 年之前 |
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Michael Schloh von Bennewitz
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b4f491a6d1
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Add a ambient light sensor circuit and route to the MCU.
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5 年之前 |
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Michael Schloh von Bennewitz
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06ee3e4234
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Resolve #80 and #89 by adding a 1 uF decoupling capacitor and connector.
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5 年之前 |
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Michael Schloh von Bennewitz
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787e5fed89
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Resolve #76 by replacing triangle solder jumper shapes with ovals.
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5 年之前 |
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Michael Schloh von Bennewitz
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7e32c82a2f
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Resolve #75 by replacing header pin footprints with solder jumpers.
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5 年之前 |
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Michael Schloh von Bennewitz
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8e36a89bf0
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Resolve #72 and #74 by rerouting traces, jumpers, and pads.
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5 年之前 |
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Michael Schloh von Bennewitz
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5547c5c17c
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Correct bottom ground plane cohesion across island regions.
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5 年之前 |
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Michael Schloh von Bennewitz
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d1de14d468
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Resolve #81 and #82 by replacing oscillator circuit and inductors.
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5 年之前 |
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Michael Schloh von Bennewitz
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be68447c46
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Improve position of bottom layer silkscreen text for designators.
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5 年之前 |
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Michael Schloh von Bennewitz
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7e9d77859b
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Bump version number pending layout engineering of STM32WL SiP migration.
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5 年之前 |
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Michael Schloh von Bennewitz
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e1e0f5c1d5
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Redesign for STM32WL SoC architecture, add features, and bump version.
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5 年之前 |
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Michael Schloh von Bennewitz
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cff212170b
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Add a paste layer to NPTH mounts to configure for foil apertures.
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5 年之前 |
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Michael Schloh von Bennewitz
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5da94c3830
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Include a solderfield breadboard to support daughterboard development.
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5 年之前 |
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Michael Schloh von Bennewitz
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c0aa16f26e
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Resolve #35 add a board to board connector to prepare daughterboards.
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5 年之前 |
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Michael Schloh von Bennewitz
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f7c398852a
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Resolve #33 Align panel to Stencil8 by relocating mount holes slightly.
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5 年之前 |
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Michael Schloh von Bennewitz
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d07d09c41a
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Increase parts count to 124, and connect all remaining circuits.
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5 年之前 |
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Michael Schloh von Bennewitz
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772f799d43
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Connect power voltage and ground to bottom quarter of board parts.
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5 年之前 |
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Michael Schloh von Bennewitz
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b7623201ba
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Dump layout regeneration after trying to design new test points.
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5 年之前 |
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Michael Schloh von Bennewitz
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4a6fe14ba6
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Apply copper pours to all layers with ground nets except on layer 3.
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5 年之前 |
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Michael Schloh von Bennewitz
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dc6f024b36
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Remove pad to pad spacing tolerance error to almost completely correct.
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5 年之前 |
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Michael Schloh von Bennewitz
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4a041e91f9
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Clean up vias, tracks, spacing, and remove redundant segments.
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5 年之前 |
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Michael Schloh von Bennewitz
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fe06fd495f
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Adjust track width, via drills, and annular rings to minimum specs.
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5 年之前 |
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Michael Schloh von Bennewitz
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50ca6fbb0b
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Connect remaining USB data and UART data circuits for input output.
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5 年之前 |
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Michael Schloh von Bennewitz
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dca0d14ff0
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Correct flawed net in cross connected serial wire debug contacts.
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5 年之前 |
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Michael Schloh von Bennewitz
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7cadc14d8f
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Connect both LEDs to MCU pins for controlling user output.
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5 年之前 |
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Michael Schloh von Bennewitz
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b639be76b3
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Complete draft revision of the radio frequency switch circuit.
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5 年之前 |
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Michael Schloh von Bennewitz
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2063328cb1
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Remove useless chip antenna which takes up more area than total size.
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5 年之前 |
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Michael Schloh von Bennewitz
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b1fa69de4a
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Replace coin cell battery holder and move crystal to make room.
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5 年之前 |
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Michael Schloh von Bennewitz
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6daad3ba72
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Complete most circuits pending layout of RF switch and passive arrays.
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5 年之前 |
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Michael Schloh von Bennewitz
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53362e2b0c
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Upload intermediate layout design with most decapsulation circuits.
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5 年之前 |
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Michael Schloh von Bennewitz
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802ec1d175
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Reflect corrections in power circuits and generally develop layout.
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5 年之前 |
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Michael Schloh von Bennewitz
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36323d05c0
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Improve tab text and position of mouse bites pending part placements.
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5 年之前 |
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Michael Schloh von Bennewitz
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0d1eed7fcb
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Reduce and (prototype) panelise for format change from badge to hat.
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5 年之前 |
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Michael Schloh von Bennewitz
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a2807cc2b2
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Correct title text delimiters in the project layout file.
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5 年之前 |
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Michael Schloh von Bennewitz
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41e5f095e8
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Include more project boilerplate structure and library cache.
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5 年之前 |
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Michael Schloh von Bennewitz
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56dfb433cc
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Initialise hardware engineering for imminent schematic capture.
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5 年之前 |
