55 コミット (7229a08eed3b3c86cb2814be6bb8dba2d27b5d01)

作成者 SHA1 メッセージ 日付
  Michael Schloh von Bennewitz 7229a08eed Add solder jumpers to decouple antenna array from transceiver switch. 4年前
  Michael Schloh von Bennewitz 772f799d43 Connect power voltage and ground to bottom quarter of board parts. 4年前
  Michael Schloh von Bennewitz b7623201ba Dump layout regeneration after trying to design new test points. 4年前
  Michael Schloh von Bennewitz 2fa32f80c2 Add test points to allow flexible postassembly prototype debugging. 4年前
  Michael Schloh von Bennewitz 4a6fe14ba6 Apply copper pours to all layers with ground nets except on layer 3. 4年前
  Michael Schloh von Bennewitz 2aa746b314 Add logos to schematic, that unfortunately do not fit in the layout. 4年前
  Michael Schloh von Bennewitz dc6f024b36 Remove pad to pad spacing tolerance error to almost completely correct. 4年前
  Michael Schloh von Bennewitz 4a041e91f9 Clean up vias, tracks, spacing, and remove redundant segments. 4年前
  Michael Schloh von Bennewitz fe06fd495f Adjust track width, via drills, and annular rings to minimum specs. 4年前
  Michael Schloh von Bennewitz 50ca6fbb0b Connect remaining USB data and UART data circuits for input output. 4年前
  Michael Schloh von Bennewitz dca0d14ff0 Correct flawed net in cross connected serial wire debug contacts. 4年前
  Michael Schloh von Bennewitz 7cadc14d8f Connect both LEDs to MCU pins for controlling user output. 4年前
  Michael Schloh von Bennewitz b639be76b3 Complete draft revision of the radio frequency switch circuit. 4年前
  Michael Schloh von Bennewitz 2063328cb1 Remove useless chip antenna which takes up more area than total size. 4年前
  Michael Schloh von Bennewitz b1fa69de4a Replace coin cell battery holder and move crystal to make room. 4年前
  Michael Schloh von Bennewitz 6daad3ba72 Complete most circuits pending layout of RF switch and passive arrays. 4年前
  Michael Schloh von Bennewitz 53362e2b0c Upload intermediate layout design with most decapsulation circuits. 4年前
  Michael Schloh von Bennewitz 8d28560c4e Tighten tolerances to highest four layer ENIG cheap fabrication capacity. 4年前
  Michael Schloh von Bennewitz 7519f8f491 Adjust ball pad clearance and solder mask aperature to allow sanity. 4年前
  Michael Schloh von Bennewitz 802ec1d175 Reflect corrections in power circuits and generally develop layout. 4年前
  Michael Schloh von Bennewitz cc5a03834a Correct power circuit in LED parts that require a power flag. 4年前
  Michael Schloh von Bennewitz 636ecc14e6 Correct flawed ground short in secure element authentication circuit. 4年前
  Michael Schloh von Bennewitz 8da9ab17c4 Correct electrical connection to chip and loop antenna symbol. 4年前
  Michael Schloh von Bennewitz eedb5cdd42 Improve mounting hole unit numbering by hand modifying identifiers. 4年前
  Michael Schloh von Bennewitz 2efab65f8a Add nested part to allow either DFN or SOIC secure elements to be used. 4年前
  Michael Schloh von Bennewitz 9364408811 Correct footprint for Atmel secure element to comply with standards. 4年前
  Michael Schloh von Bennewitz 36323d05c0 Improve tab text and position of mouse bites pending part placements. 4年前
  Michael Schloh von Bennewitz 0d1eed7fcb Reduce and (prototype) panelise for format change from badge to hat. 4年前
  Michael Schloh von Bennewitz 57d2b72b53 Add test point loops and correct sized mounting holes. 4年前
  Michael Schloh von Bennewitz 2a1cbb6ddb Add nested part to allow either DFN or SOIC EEPROMs to be used. 4年前
  Michael Schloh von Bennewitz f779b7999a Adapt layers and tolerances to correspond with four layer qualities. 4年前
  Michael Schloh von Bennewitz aea4480af7 Hide copper antenna surface underneath soldermask instead of plating it. 4年前
  Michael Schloh von Bennewitz 69acaf3e33 Add EEPROM, jumpers, and connector pending migration to hat format. 4年前
  Michael Schloh von Bennewitz 54e8c2e73c Correct schematics after electric rules check results in warnings. 4年前
  Michael Schloh von Bennewitz 0b9e714c81 Update library cache to most recent changes and add forgotten netlist. 4年前
  Michael Schloh von Bennewitz a88a134751 Update existing schematics after modification and subsequent reannotation. 4年前
  Michael Schloh von Bennewitz 37dbf8f109 Adequately improve and clarify power circuit design for bug #12. 4年前
  Michael Schloh von Bennewitz fc60477441 Correct poor abstraction bug #4 and generally complete Microchip circuits. 4年前
  Michael Schloh von Bennewitz 33e82abaa5 Add missing antenna footprints, in use during layout design. 4年前
  Michael Schloh von Bennewitz 4a307de515 Add LDO voltage regulator to step down from 5V (Host/USB) to 3V3. 4年前
  Michael Schloh von Bennewitz d46e563e62 Add ECC authentication secure element for imminent schematic capture. 4年前
  Michael Schloh von Bennewitz a71b05cc81 Prepare for layout edition in BGA with corresponding traces and vias. 4年前
  Michael Schloh von Bennewitz ff52db338c Annotate symbols, correct power circuits, and assign footprints. 4年前
  Michael Schloh von Bennewitz c2b37009ee Add remaining circuits to almost complete minimum MCU application. 4年前
  Michael Schloh von Bennewitz 202089cd61 Complete draft design of RF switch for power amplifier and HF circuits. 4年前
  Michael Schloh von Bennewitz 8731ecd254 Create and add a SKY13373 RF switch with corresponding symbol and footprint. 4年前
  Michael Schloh von Bennewitz ea03063239 Initialise schematic hierarchy and add nested blocks for controller logic. 4年前
  Michael Schloh von Bennewitz 0b005a0f67 Add very small crystal oscillator needed for microcontroller operation. 4年前
  Michael Schloh von Bennewitz 6076ee8863 Indicate UHF tranceiver and power functions completing symbols. 4年前
  Michael Schloh von Bennewitz 425ff0092a Add MCU part symbols and missing BGA footprint to project libraries. 4年前