 Michael Schloh von Bennewitz
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6c5b7f37b9
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Commit overlooked file name change from previous renaming.
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4 年前 |
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Michael Schloh von Bennewitz
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dde3d94692
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Add forgotten Raspberry Pi 40W female connector material information.
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4 年前 |
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Michael Schloh von Bennewitz
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22eb0a237f
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Rename the bill of materials associated with Microchip SiP parts.
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4 年前 |
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Michael Schloh von Bennewitz
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cd5e47e89f
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Integrate new audio level sensor library symbol and regenerate netlists.
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4 年前 |
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Michael Schloh von Bennewitz
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6e8d767677
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Correct TSNP name, adjust crystal capacitors, and add an audio sensor.
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4 年前 |
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Michael Schloh von Bennewitz
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7b4a5a9ded
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Correct TSNP package name after adding corresponding footprint.
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4 年前 |
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Michael Schloh von Bennewitz
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fa1bcf02a3
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Add a Grove connector, audio level sensor, and remove a UART test point.
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4 年前 |
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Michael Schloh von Bennewitz
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7435efc28c
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Add a library symbol for the soon to be added audio level sensor.
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4 年前 |
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Michael Schloh von Bennewitz
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04a0c9943b
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Add footprints and shaded models for soon to be added sensors.
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4 年前 |
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Michael Schloh von Bennewitz
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166e5a0520
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Correct TSNP package name and adjust crystal capacitors accordingly.
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4 年前 |
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Michael Schloh von Bennewitz
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f332c465c1
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Correct serial connector library symbol for future compatability.
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4 年前 |
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Michael Schloh von Bennewitz
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7e9d77859b
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Bump version number pending layout engineering of STM32WL SiP migration.
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4 年前 |
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Michael Schloh von Bennewitz
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9a36de62c9
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Correct footprint related flaws in preparation for layout edition.
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4 年前 |
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Michael Schloh von Bennewitz
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06be85075b
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Renumber and bump version pending layout edition of ST SoC migration.
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4 年前 |
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Michael Schloh von Bennewitz
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1f6ccf22da
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Improve placement of RF switch circuits by centering entire schematic.
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4 年前 |
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Michael Schloh von Bennewitz
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f124b45881
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Correct flawed connector symbol in schematic for SiP architecture.
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4 年前 |
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Michael Schloh von Bennewitz
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e1e0f5c1d5
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Redesign for STM32WL SoC architecture, add features, and bump version.
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4 年前 |
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Michael Schloh von Bennewitz
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b40d64841f
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Add a comment collumn to accommodate do not place (DNP) parts.
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4 年前 |
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Michael Schloh von Bennewitz
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494fcf43c1
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Complete bill of materials for current prototype design revision 0.8.2.
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4 年前 |
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Michael Schloh von Bennewitz
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cff212170b
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Add a paste layer to NPTH mounts to configure for foil apertures.
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4 年前 |
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Michael Schloh von Bennewitz
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44bdd2e1e4
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Bump hardware revision number pending release to manufacturing.
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4 年前 |
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Michael Schloh von Bennewitz
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65fc253676
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Add panel support like mouse bite integrated tabs for panelisation.
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4 年前 |
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Michael Schloh von Bennewitz
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5da94c3830
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Include a solderfield breadboard to support daughterboard development.
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4 年前 |
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Michael Schloh von Bennewitz
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c0aa16f26e
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Resolve #35 add a board to board connector to prepare daughterboards.
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4 年前 |
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Michael Schloh von Bennewitz
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f7c398852a
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Resolve #33 Align panel to Stencil8 by relocating mount holes slightly.
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4 年前 |
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Michael Schloh von Bennewitz
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04d94df71d
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Avoid tracking manufacturing archives and selectively copy to releases.
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4 年前 |
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Michael Schloh von Bennewitz
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0a3fb0548d
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Resolve #21 publish a bill of materials, in draft without suppliers.
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4 年前 |
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Michael Schloh von Bennewitz
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9ef3094d39
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Resolve #32 include missing footprints by adding shaded models.
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4 年前 |
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Michael Schloh von Bennewitz
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6c7b76d799
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Bump hardware revision number pending milestone progress and test cycle.
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4 年前 |
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Michael Schloh von Bennewitz
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d07d09c41a
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Increase parts count to 124, and connect all remaining circuits.
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4 年前 |
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Michael Schloh von Bennewitz
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15d9f44faf
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Regenerate the netlist after introducing solder jumpers for antennas.
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4 年前 |
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Michael Schloh von Bennewitz
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b657eb2ec5
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Add solder switch symbols for use in new antenna decoupling from switch.
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4 年前 |
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Michael Schloh von Bennewitz
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7229a08eed
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Add solder jumpers to decouple antenna array from transceiver switch.
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4 年前 |
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Michael Schloh von Bennewitz
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772f799d43
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Connect power voltage and ground to bottom quarter of board parts.
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4 年前 |
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Michael Schloh von Bennewitz
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b7623201ba
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Dump layout regeneration after trying to design new test points.
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4 年前 |
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Michael Schloh von Bennewitz
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2fa32f80c2
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Add test points to allow flexible postassembly prototype debugging.
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4 年前 |
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Michael Schloh von Bennewitz
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4a6fe14ba6
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Apply copper pours to all layers with ground nets except on layer 3.
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4 年前 |
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Michael Schloh von Bennewitz
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2aa746b314
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Add logos to schematic, that unfortunately do not fit in the layout.
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4 年前 |
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Michael Schloh von Bennewitz
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dc6f024b36
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Remove pad to pad spacing tolerance error to almost completely correct.
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4 年前 |
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Michael Schloh von Bennewitz
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4a041e91f9
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Clean up vias, tracks, spacing, and remove redundant segments.
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4 年前 |
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Michael Schloh von Bennewitz
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fe06fd495f
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Adjust track width, via drills, and annular rings to minimum specs.
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4 年前 |
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Michael Schloh von Bennewitz
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50ca6fbb0b
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Connect remaining USB data and UART data circuits for input output.
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4 年前 |
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Michael Schloh von Bennewitz
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dca0d14ff0
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Correct flawed net in cross connected serial wire debug contacts.
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4 年前 |
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Michael Schloh von Bennewitz
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7cadc14d8f
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Connect both LEDs to MCU pins for controlling user output.
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4 年前 |
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Michael Schloh von Bennewitz
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b639be76b3
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Complete draft revision of the radio frequency switch circuit.
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4 年前 |
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Michael Schloh von Bennewitz
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2063328cb1
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Remove useless chip antenna which takes up more area than total size.
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4 年前 |
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Michael Schloh von Bennewitz
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b1fa69de4a
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Replace coin cell battery holder and move crystal to make room.
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4 年前 |
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Michael Schloh von Bennewitz
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6daad3ba72
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Complete most circuits pending layout of RF switch and passive arrays.
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4 年前 |
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Michael Schloh von Bennewitz
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53362e2b0c
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Upload intermediate layout design with most decapsulation circuits.
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4 年前 |
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Michael Schloh von Bennewitz
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8d28560c4e
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Tighten tolerances to highest four layer ENIG cheap fabrication capacity.
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4 年前 |
