4 yıl önce %!s(int64=34) son sürümden beri %!d(string=master) işleme
This release marks improvement of design work on Microchip SAMR34 architecture hardware circuits and firmware samples.
Files terminating with .bin in the firmware archive are Cortex-M0+ binaries to program the SAMR34 chip using a SWD capable debugging device on connectors J4 and J20.
| Num | Description |
|---|---|
| #175 | The parts list lacks antenna recommendations |
| #174 | P2P application fails to print to serial console |
| #172 | Integrate Qwiic and Stemma |
| #167 | EEPROM device tree lacks the reset GPIO |
| #165 | Chip antenna AE5 position is not 50Ω impedance |
| #164 | List of unique parts contains too many parts |
| #163 | The alternate TCXO design lacks a EN signal |
| #162 | The D2 diode is too close to a corner hole |
| #161 | Hinge cutout position and size are wrong |
| #160 | Conflicting GCLK0 is used for LSE tests |
| #159 | D1 and D2 resistance levels are not balanced |
| #158 | The diode at D8 is uncomfortably bright |
| #157 | Designators are not axis aligned |
| #155 | C96 lacks an alternate TCX0 notation |
| #154 | Panel mounts are the wrong diameter |
| #153 | The host is unable to reset the chip |
| #146 | JTAG connection is incomplete |
| #145 | Fiducials cause automation failure |
| #141 | S11 measurements are missing |
| #138 | EEPROM header J7 may be unnecessary |
| #137 | Incompatability with A and B boards |
| #136 | EEPROM is delivered in empty state |
| #135 | Use of GCLK_0 for LSE output is flawed |
| #131 | Copper pours exclude areas improperly |
| #123 | Test HSE crystal circuit for best practice |
| #121 | Test LSE crystal circuit for best practice |
| #79 | Resolve LED intensity consistency |
| #68 | Allow flash programming over UART |
| #67 | Obtain parts for production devices |
| #63 | Consider lack of frequency adoption |
| #59 | Optimise bypass capacitances |
| #55 | Optimise the radio switch circuit |
| #47 | Integrate Click sensors |
| #46 | Integrate PMOD sensors |
| #44 | Measure S11/S21 parameters |
| #39 | Indicate parts placements |
| #38 | Obtain sample parts |
| #37 | Do virtual visits to stakeholders |
| #36 | Discuss tolerances with fabricators |
| #31 | RF layers lack via stiching |
| #30 | Reduce copper layers |
| #25 | Structure EPROM Data |
| #24 | STM delivery conditions unmet |
| #16 | Resolve lack of SDK resources |
| #9 | Test several antennas |
4 yıl önce %!s(int64=123) son sürümden beri %!d(string=master) işleme
This release marks conclusion of design work on Microchip SAMR34 architecture hardware circuits and firmware samples.
Files terminating with .bin in the firmware archive are Cortex-M0+ binaries to program the SAMR34 chip using a SWD capable debugging device on connectors J4 and J20.
| Num | Description |
|---|---|
| #128 | USB bus power destroys MCU PA07 |
| #127 | A clock rerouted pin is not broken out |
| #126 | BGA footprint lacks alignment markings |
| #122 | SMA connector is secondary and unneeded |
| #118 | Capacitor C18-19 values are wrong |
| #114 | C30 is placed 27pF instead of 2,7pF |
| #112 | Samples lack Microchip reference |
| #111 | Documentation lacks a P2P sample |
| #109 | RTC in MLS fails when PMM is enabled |
| #107 | UART lines lack pullup resistors |
| #105 | Solder chemistry is wrong for BGA |
| #104 | AE5 pad 1 has unconnected vias |
| #97 | The paste layer lacks a ground pad |
| #96 | The panel design lacks a frame template |
| #94 | Integrate Grove sensors enhancement |
| #93 | The LDO at U2 is the wrong footprint |
| #92 | Silkscreen designators are not fixed bug |
| #91 | Test FB1 with MH2029-601Y alternative |
| #89 | Design lacks a standard JTAG connector |
| #88 | Jumper between C22 and PA9 is missing |
| #85 | Apply the catchall diagnosis step |
| #84 | Solve UART encoding corruption |
| #83 | Ensure power detour matches MLS |
| #82 | Replace oscillator with a suitable crystal |
| #81 | L1 is not clearly marked DNF |
| #80 | A 1μF capacitor is missing near VDDCORE |
| #78 | Replace yellow D2 with red colour |
| #76 | Replace solderjumpers with oval shapes |
| #75 | Modify header pins to solder jumpers |
| #74 | Traces to JP2 and JP3 are wrong bug |
| #73 | Replace XC1 with inexpensive option |
| #72 | Route TP3 and TP4 to I²C bus |
| #71 | Change FB1 from 0402 to 0805 |
| #70 | JP7 and JP9 are optically reversed |
| #65 | Verify most current reference circuits |
| #62 | Request a wireless design review |
| #61 | Request a MCU design review |
| #43 | Test several tactile switches |
| #37 | Do virtual visits to stakeholders |
| #35 | Add a board to board connector |
| #34 | Switch antennas mechanically |
| #33 | Align panel to Stencil8 |
| #32 | Include missing footprints |
| #29 | Reduce part layers |
| #21 | Publish a bill of materials |
| #17 | Test documentation is lacking |
| #15 | Complete a draft design |
| #14 | Add missing footprints |
| #13 | Add missing symbols |
| #12 | Clarify ATSAMR34 power circuits |
| #11 | Document collection is missing |
| #10 | Progress information is lacking |
| #8 | Design for daughterboards |
| #6 | Segregate ground planes |
| #4 | Refactor schematic blocks |